Scaling the silicon bipolar transistor for sub-100-ps ECL circuit operation at liquid nitrogen temperature
- 1 March 1990
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 37 (3), 680-691
- https://doi.org/10.1109/16.47773
Abstract
A two-dimensional device simulator was used to examine the various profile design strategies for silicon bipolar transistors operating at liquid-nitrogen temperatures. Special emphasis was placed on the scaling tradeoffs of these design approaches. It is concluded that a relaxed scaling technique based on the maintenance of constant base Gummel number with a slight decrease in emitter doping level probably offers the best overall low-temperature design strategy for scaled double-polysilicon devices. To verify these calculations, devices with 0.8-μm lithography were fabricated using this design scheme. Transistors were found to be reasonably ideal at low temperatures and had adequate current gain for most digital applications. Unloaded ECL ring oscillators operated at sub-100-ps speeds at liquid-nitrogen temperatures. Simulations based on measured data indicate that sub-150-ps loaded ECL delays are achievable at about 4-mW power at 87 K if the circuit logic swing is reduced to 300 mV. These data suggest that conventionally designed silicon bipolar transistors are attractive candidates for very-high-performance applications in the low-temperature environment.link_to_subscribed_fulltexKeywords
This publication has 19 references indexed in Scilit:
- On the low-temperature static and dynamic properties of high-performance silicon bipolar transistorsIEEE Transactions on Electron Devices, 1989
- Junction degradation in bipolar transistors and the reliability imposed constraints to scaling and designIEEE Transactions on Electron Devices, 1988
- Optimization of bipolar transistors for low temperature operationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1987
- Non-ideal base current in bipolar transistors at low temperaturesIEEE Transactions on Electron Devices, 1987
- Measurement of electron lifetime, electron mobility and band-gap narrowing in heavily doped p-type siliconPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1986
- Simultaneous measurement of hole lifetime, hole mobility and bandgap narrowing in heavily doped n-type siliconPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1985
- Finite-Element Analysis of Semiconductor Devices: The FIELDAY ProgramIBM Journal of Research and Development, 1981
- Heavy doping effects in p-n-p bipolar transistorsIEEE Transactions on Electron Devices, 1980
- Bipolar circuit scalingPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1979
- The temperature dependence of ideal gain in double diffused silicon transistorsIEEE Transactions on Electron Devices, 1968