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A fully self-aligned stacked CMOS 64K SRAM
Home
Publications
A fully self-aligned stacked CMOS 64K SRAM
A fully self-aligned stacked CMOS 64K SRAM
RS
R. Sundaresan
R. Sundaresan
SM
S.D.S. Malhi
S.D.S. Malhi
LH
L.R. Hite
L.R. Hite
AS
A.H. Shah
A.H. Shah
HL
H.W. Lam
H.W. Lam
PC
P.K. Chatterjee
P.K. Chatterjee
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1 January 1984
conference paper
Published by
Institute of Electrical and Electronics Engineers (IEEE)
p.
871-873
https://doi.org/10.1109/iedm.1984.190871
Abstract
No abstract available
Keywords
RANDOM ACCESS MEMORY
CMOS TECHNOLOGY
FABRICATION
SILICON
ELECTRODES
IMPLANTS
PLASMA APPLICATIONS
ETCHING
ANNEALING
INSTRUMENTS
Cited by 2 articles