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A high-performance microarchitecture with hardware-programmable functional units
Home
Publications
A high-performance microarchitecture with hardware-programmable functional units
A high-performance microarchitecture with hardware-programmable functional units
RR
Rahul Razdan
Rahul Razdan
MS
Michael D. Smith
Michael D. Smith
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1 January 1994
conference paper
Published by
Association for Computing Machinery (ACM)
p.
172-180
https://doi.org/10.1145/192724.192749
Abstract
No abstract available
Keywords
AUTOMATIC INSTRUCTION SET DESIGN
COMPILE-TIME OPTIMIZATION
GENERAL-PURPOSE MICROARCHITECTURES
LOGIC SYNTHESIS
PROGRAMMABLE LOGIC
Cited by 130 articles