Abstract
By making use of the shift-and-add property of the maximal-length linear binary sequence, phase-delayed versions of the same sequence can be obtained by means of linear logic networks (modulo 2 adders) in conjunction with the sequence generator (e.g. a feedback shift register). This approach gives an alternative to the straightforward one which actually introduces the required time delays.The optimum way of deriving delayed versions in order to minimise the number of serial logical operations is indicated. The maximum number of serial additions required is given closely by log2n, where n denotes the number of binary stages in the generator. The advantages and shortcomings of this approach are briefly discussed.