Effects Of Grain Boundaries On Channel Conduction In Thin Film Polysilicon On Silicon-Dioxide Metal Oxide Semiconductor Field Effect Transistors (SOI MOSFETs)

Abstract

A physical model that describes the effects of grain boundaries on the linear-region, strong-inversion channel conductance of SOI (polysilicon on silicon-dioxide) MOSFETs is developed and is supported by measurements of laser-recrystallized devices. The model predicts an effective turn-on characteristic that occurs beyond the strong-inversion threshold, and henceforth defines the "carrier mobility threshold voltage" and the effective (transconductance) carrier mobility in the channel, which typically is higher than the actual (intragrain) mobility. These parameters, which are defined by the properties of the grain boundaries, can easily be misinterpreted experimentally as the threshold voltage and the actual carrier mobility. The actual threshold voltage is defined by the charge coupling between the front and back gates of the thin-film transistor. This coupling is discussed and a closed-form expression for the threshold voltage, which depends on the back-gate bias and on the properties of the back Si-Si0₂ interface, is given.