The two principal silicon-on-insulator fabrication techniques are examined. The first is by buried porous Si formation; areas surrounding device islands are converted into porous Si by proper tailoring of the wafer dopant profile. It is known as FIPOS (full insulation by porous oxidized silicon). The second is by epitaxy on porous Si; a uniform surface porous Si layer is used as a seeding layer for low-temperature epitaxy of the device Si. Oxidation of the underlying porous Si layer, via trenches in the device Si, has been improved to the point that defect generation and wafer warpage are avoided. Fabrication of advanced devices on the FIPOS material has shown that the porous silicon technology is among the front-runners for high-performance CMOS LSIs.