A Survey of Iron Contamination in Silicon Substrates and Its Impact on Circuit Yield

Abstract

Iron disilicide precipitates have been found in emitter regions on an ion‐implanted, shallow bipolar process and the presence of these rodlike precipitates has been shown to reduce the yield on integrated circuits. The source of the iron contamination has been shown to be the substrate material, 75 mm CZ p‐type wafers, as supplied by the manufacturers. Atomic absorption analysis has been used to measure the iron content of unprocessed wafers from several sources and has identified both bulk and polished side contamination. Finally, circuit yield data is presented which indicates a correlation between good yield and low iron levels in the starting material and vice versa.