Logic delays of 5-μm resistor coupled Josephson logic
- 1 November 1982
- journal article
- Published by AIP Publishing in Applied Physics Letters
- Vol. 41 (9), 886-888
- https://doi.org/10.1063/1.93686
Abstract
Logic delays of resistor coupled Josephson logic (RCJL) have been investigated. An experimental circuit with a cascade chain of ten RCJL OR gates was fabricated using Pb-alloy Josephson IC technology with 5-μm minimum linewidth. Logic delay was measured to be as low as 10.8 ps with power dissipation of 11.7 μW. This demonstrates a switching operation faster than those reported for other Josephson gate designs. Comparison with computer-simulation results is also presented.Keywords
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