A superconducting sampler for Josephson logic circuits
- 1 November 1979
- journal article
- research article
- Published by AIP Publishing in Applied Physics Letters
- Vol. 35 (9), 718-719
- https://doi.org/10.1063/1.91266
Abstract
A method is described for automating a technique which is used to sample transition duration (rise time) in superconducting logic circuits. The method is based on measuring the time at which a biased Josephson junction switches under the influence of an applied signal. The system transition duration is limited primarily by time jitter which is estimated to be 7 ps. Transition durations of as little as 9 ps have been observed.Keywords
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