A CAD framework for simulation and optimization of high-speed VLSI interconnections
- 1 January 1992
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Circuits and Systems I: Regular Papers
- Vol. 39 (11), 893-906
- https://doi.org/10.1109/81.199888
Abstract
No abstract availableKeywords
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