A butterfly processor-memory interconnection for a vector processing environment
- 1 February 1987
- journal article
- Published by Elsevier in Parallel Computing
- Vol. 4 (1), 103-110
- https://doi.org/10.1016/0167-8191(87)90066-4
Abstract
No abstract availableThis publication has 4 references indexed in Scilit:
- Effects of synchronization barriers on multiprocessor performanceParallel Computing, 1986
- Reduced instruction set computersCommunications of the ACM, 1985
- Performance of Processor-Memory Interconnections for MultiprocessorsIEEE Transactions on Computers, 1981
- Analysis and Simulation of Buffered Delta NetworksIEEE Transactions on Computers, 1981