Performance of Processor-Memory Interconnections for Multiprocessors
- 1 October 1981
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computers
- Vol. C-30 (10), 771-780
- https://doi.org/10.1109/tc.1981.1675695
Abstract
A class of interconnection networks based on some existing permutation networks is described with applications to processor to memory communication in multiprocessing systems. These networks, termed delta networks, allow a direct link between any processor to any memory module. The delta networks and full crossbars are analyzed with respect to their effective bandwidth and cost. The analysis shows that delta networks have a far better performance per cost than crossbars in large multiprocessing systems.Keywords
This publication has 9 references indexed in Scilit:
- Study of multistage SIMD interconnection networksPublished by Association for Computing Machinery (ACM) ,1978
- On the Effective Bandwidth of Parallel MemoriesIEEE Transactions on Computers, 1977
- The Indirect Binary n-Cube Microprocessor ArrayIEEE Transactions on Computers, 1977
- Interference in multiprocessor computer systems with interleaved memoryCommunications of the ACM, 1976
- Access and Alignment of Data in an Array ProcessorIEEE Transactions on Computers, 1975
- Analysis of Memory Interference in MultiprocessorsIEEE Transactions on Computers, 1975
- Banyan networks for partitioning multiprocessor systemsPublished by Association for Computing Machinery (ACM) ,1973
- Parallel Processing with the Perfect ShuffleIEEE Transactions on Computers, 1971
- Very high-speed computing systemsProceedings of the IEEE, 1966