Simulation of high-speed interconnects

Abstract

With the rapid developments in very large-scale integration (VLSI) technology, design and computer-aided design (CAD) techniques, at both the chip and package level, the operating frequencies are fast reaching the vicinity of gigahertz and switching times are getting to the subnanosecond levels. The ever increasing quest for high-speed applications is placing higher demands on interconnect performance and highlighted the previously negligible effects of interconnects such as ringing, signal delay, distortion, reflections, and crosstalk. In this review paper various high-speed interconnect effects are briefly discussed. In addition, recent advances in transmission line macromodeling techniques are presented. Also, simulation of high-speed interconnects using model-reduction-based algorithms is discussed in detail.