Logic decomposition algorithms for the timing optimization of multi-level logic
- 7 January 2003
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 4 references indexed in Scilit:
- Timing optimization of combinational logicPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- DAGON: technology binding and local optimization by DAG matchingPublished by Association for Computing Machinery (ACM) ,1987
- Delay optimization of combinational static CMOS logicPublished by Association for Computing Machinery (ACM) ,1987
- Synthesis and Optimization of Multilevel Logic under Timing ConstraintsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1986