Automatic PLA Synthesis from a DDL-P Description
- 1 January 1981
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 391-397
- https://doi.org/10.1109/dac.1981.1585386
Abstract
This paper describes an automatic PLA synthesis (APLAS) system which automatically generates a PLA for the control function of a design from a DDL-P description of a digital system. APLAS can also minimize and partition the PLA to meet the design constraints. This is a very convenient tool for designing finite state machines. The control circuit of any digital system for which a state diagram can be drawn can be designed easily using this system.Keywords
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