Functional extension of symbolic model checking
- 1 January 1992
- book chapter
- Published by Springer Nature in Lecture Notes in Computer Science
- p. 225-232
- https://doi.org/10.1007/3-540-55179-4_22
Abstract
No abstract availableKeywords
This publication has 4 references indexed in Scilit:
- The formal verification chain at BULLPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Representing circuits more efficiently in symbolic model checkingPublished by Association for Computing Machinery (ACM) ,1991
- Sequential circuit verification using symbolic model checkingPublished by Association for Computing Machinery (ACM) ,1990
- Automatic Verification of Sequential Circuits Using Temporal LogicIEEE Transactions on Computers, 1986