Critical area and critical levels calculation in IC yield modeling
- 1 February 1988
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 35 (2), 158-166
- https://doi.org/10.1109/16.2435
Abstract
No abstract availableKeywords
This publication has 6 references indexed in Scilit:
- Role of defect size distribution in yield modelingIEEE Transactions on Electron Devices, 1985
- Modeling the critical area in yield forecastsIEEE Journal of Solid-State Circuits, 1985
- Modeling of defects in integrated circuit photolithographic patternsIBM Journal of Research and Development, 1984
- Modeling of Integrated Circuit Defect SensitivitiesIBM Journal of Research and Development, 1983
- Defect density distribution for LSI yield calculationsIEEE Transactions on Electron Devices, 1973
- Cost-size optima of monolithic integrated circuitsProceedings of the IEEE, 1964