Abstract
The authors outline a methodology to predict fatigue life of flip chip bonds under thermal cycling conditions. First, finite-element simulations are used to estimate the assembly stiffness for the chip/substrate configurations. Next, the assembly stiffness is used with a constitutive relation to the solder to simulate stress-strain hysteresis loops under various conditions of ramp rate, dwell time, and temperature range. Finally, the mean cycles to failure are correlated with the creep strain per cycle using a simple Coffin-Manson relation. The analysis procedure does not rely on empirical relations to account for temperature and frequency effects; hence, extrapolation to field use conditions can be done with greater confidence. Since finite-element simulations are used to characterize the joint/assembly interaction, three-dimensional loading effects and local expansion mismatches are accounted for. The methodology can also be extended to power cycling conditions, which have the additional complication of temperature gradients in the structure.

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