Design, analysis, and simulation of I/O architectures for hypercube multiprocessors
- 1 April 1990
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Parallel and Distributed Systems
- Vol. 1 (2), 140-151
- https://doi.org/10.1109/71.80142
Abstract
No abstract availableThis publication has 14 references indexed in Scilit:
- Performance of the direct binary n-cube network for multiprocessorsIEEE Transactions on Computers, 1989
- An evaluation of multiple-disk I/O systemsIEEE Transactions on Computers, 1989
- Distributing resources in hypercube computersPublished by Association for Computing Machinery (ACM) ,1988
- Memory requirements for balanced computer architecturesACM SIGARCH Computer Architecture News, 1986
- “Hot spot” contention and combining in multistage interconnection networksIEEE Transactions on Computers, 1985
- Algorithms for concurrent processorsPhysics Today, 1984
- The Performance of Multistage Interconnection Networks for MultiprocessorsIEEE Transactions on Computers, 1983
- Analysis of Multiprocessors with Private Cache MemoriesIEEE Transactions on Computers, 1982
- Analysis and Simulation of Buffered Delta NetworksIEEE Transactions on Computers, 1981
- A large scale, homogeneous, fully distributed parallel machine, IACM SIGARCH Computer Architecture News, 1977