An approach for multilevel logic optimization targeting low power
- 1 August 1996
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- Vol. 15 (8), 889-901
- https://doi.org/10.1109/43.511569
Abstract
This paper shows that using don't cares computed for area optimization during local node minimization may result in an increase in the power consumption of other nodes in a Boolean network. It then presents techniques for computing a subset of observability and satisfiability don't care conditions that can be used freely to optimize the local function of nodes. The concept of minimal variable support is then used to optimize the local function of each node for minimum power using its power relevant don't care set, that is, to reimplement the local function using a modified support that has a lower switching activity. Empirical results on a set of benchmark circuits are presented and discussed.Keywords
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