An Optimal Ordering of Electronic Circuit Equations for a Sparse Matrix Solution

Abstract

Sparse matrix storage and solution techniques are used extensively in solving very large systems of hundreds of linear equations which arise in the analysis of multiply interconnected physical systems. These techniques have often been overlooked in the analysis of relatively small electric networks even though their use can result in very significant improvements in computer storage requirements and execution times. The time savings is particularly noticeable when many solutions for the same circuit with different parameter values are required. particular sparse matrix storage, reordering, and solution technique is described. A node renumbering algorithm which is specifically directed at preserving the sparse structure of nodal admittance matrices during the solution by Gaussian elimination is described in detail. Computer flow charts for the renumbering are included along with specific circuit examples which compare the relative computational effort required for sparse solution versus full matrix solution.