A high-speed Hi-CMOSII 4K static RAM
- 1 October 1981
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 16 (5), 449-453
- https://doi.org/10.1109/jssc.1981.1051621
Abstract
Using advanced high-performance CMOS (Hi-CMOSII) technology and a high-speed circuit technique, a fully static 4096-word by one-bit RAM with typical address access time of 18 ns and power dissipation of 150 mW has been designed. The power-access-time product realized by the design is almost an order of magnitude better than existing NMOS 4K static RAMs. Moreover, to produce low-cost high-density static RAMs, a new redundancy technique utilizing laser shorting of intrinsic polysilicon is proposed.Keywords
This publication has 5 references indexed in Scilit:
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- A 25ns 4K static RAMPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1979
- A high-speed, low-power Hi-CMOS 4K static RAMPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1978
- A high performance 4K static RAM fabricated with an advanced MOS technologyPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1977