Routing Techniques for Gate Array
- 1 October 1983
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- Vol. 2 (4), 301-312
- https://doi.org/10.1109/tcad.1983.1270048
Abstract
No abstract availableThis publication has 17 references indexed in Scilit:
- Efficient Algorithms for Channel RoutingIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1982
- Two-dimensional stochastic model for interconnections in master slice integrated circuitsIEEE Transactions on Circuits and Systems, 1981
- An Automatic/Interactive Layout Planning System for Arbitrarily-Sized Rectangular Building BlocksPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1981
- Global RouterPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1979
- Use of Steiner's problem in suboptimal routing in rectilinear metricIEEE Transactions on Circuits and Systems, 1976
- A Review of the Placement and Quadratic Assignment ProblemsSIAM Review, 1972
- The complexity of theorem-proving proceduresPublished by Association for Computing Machinery (ACM) ,1971
- Wire routing by optimizing channel assignment within large aperturesPublished by Association for Computing Machinery (ACM) ,1971
- On Steiner’s Problem with Rectilinear DistanceSIAM Journal on Applied Mathematics, 1966
- An Algorithm for Path Connections and Its ApplicationsIEEE Transactions on Electronic Computers, 1961