An Automatic/Interactive Layout Planning System for Arbitrarily-Sized Rectangular Building Blocks
- 1 January 1981
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 293-300
- https://doi.org/10.1109/dac.1981.1585366
Abstract
Layout Planning Aids (LPA) is designed to allow easy generation of topological layout (chip) plans for IC mask designs. The output of LPA is a hard-copy topological plan. The system encourages a hierarchical design style. It encompasses both algorithmic and computer-assisted, designer-controlled approaches to the problem by providing automatic placement and routing facilities plus a set of versatile interactive commands. The interactive features allow designers to work collaboratively with the system such that the strengths of both can be combined to achieve the best results.Keywords
This publication has 8 references indexed in Scilit:
- A Timing Verification System Based on Extracted MOS/VLSI Circuit ParametersPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1981
- A MOS/LSI Oriented Logic SimulatorPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1981
- Bolt - A Block Oriented Design Specification LanguagePublished by Institute of Electrical and Electronics Engineers (IEEE) ,1981
- SIDS (A Symbolic Interactive Design System)Published by Association for Computing Machinery (ACM) ,1980
- A Min-Cut Placement Algorithm for General Cell Assemblies Based on a Graph RepresentationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1979
- Placement Algorithms for Arbitrarily Shaped BlocksPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1979
- A “Dogleg” channel routerPublished by Association for Computing Machinery (ACM) ,1976
- Clustering and linear placementPublished by Association for Computing Machinery (ACM) ,1972