Survey of switching techniques in high-speed networks and their performance
- 4 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 1242-1251 vol.3
- https://doi.org/10.1109/infcom.1990.91380
Abstract
The major ATM switch architectures and their improvement techniques are categorized and discussed, focusing on performance issues. The performance measures of interest are the maximum throughput, the delay time, and the cell loss probability. The major assumptions and notations used are summarized. A survey is presented of nonblocking switches and their improvement techniques. The performances of a variety of nonblocking switches are compared.<>Keywords
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