Trap-assisted tunneling in high permittivity gate dielectric stacks

Abstract

The electrical characteristics of ${\mathrm{SiO}}_x/{\mathrm{ZrO}}_{\mathrm{2}}$ and ${\mathrm{SiO}}_x/{\mathrm{Ta}}_{\mathrm{2}}{\mathrm{O}}_{\mathrm{5}}$ gate dielectric stacks are investigated. The current–density $J_G$ in these dielectric stacks is shown to be strongly temperature dependent at low voltage (below about 2 V), the more so in the ${\mathrm{ZrO}}_{\mathrm{2}}$ stack. On the other hand, $J_G$ is much less temperature dependent at higher voltage. These results are consistent with a model which takes into account the direct tunneling of electrons across the ${\mathrm{SiO}}_x$ layer and the trap-assisted tunneling of electrons through traps with energy levels below the conduction band of the high permittivity dielectric layer. The energy levels and densities of these electron trapping centers are estimated by fitting this trap-assisted tunneling model to the experimental results.