A new design for submicron double-barrier resonant tunnelling transistors

Abstract

A new fabrication technique is described for a submicron vertical AlGaAs/GaAs double-barrier resonant tunnelling transistor which is ideal for investigating single electron charging of, and single electron tunnelling through, a quantum dot containing just a `few' electrons. The electrical characteristics and figures of merit are presented to demonstrate the improved `squeezing' capability of the Schottky gate which is located around, and partially on, the etched side wall of the device mesa after a combined dry and wet etch to a point below the two barriers, and contrasted with those of an earlier design where etching is stopped above the two barriers.