Formation and characterization of nanometer scale metal-oxide-semiconductor structures on GaAs using low-temperature atomic layer deposition
- 27 June 2005
- journal article
- Published by AIP Publishing in Applied Physics Letters
- Vol. 87 (1), 013501
- https://doi.org/10.1063/1.1954902
Abstract
Atomic layer deposition (ALD) grown has excellent bulk and interface properties on III-V compound semiconductors and is used as gate dielectric for GaAs and GaN metal-oxide-semiconductor field-effect transistors (MOSFETs). The low-temperature (LT) ALD technology enables us to fabricate MOS structures on GaAs, defined by nanoimprint lithography. The electrical characterization of these nanostructured dielectrics demonstrates that the bulk oxide films and the oxide-GaAs interfaces are of high quality even in nanometer scale. The submicron gate length GaAs MOSFET formed by LT-ALD and lift-off process shows well-behaved transistor characteristics. This GaAs MOSFET process is ready to scale the gate length below for ultra-high-speed or THz transistor applications.
Keywords
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