Strategy for Selective Printing of Gate Insulators Customized for Practical Application in Organic Integrated Devices

Abstract

Direct drawing techniques have contributed to the ease of patterning soft electronic materials, which are the building blocks of analog and digital integrated circuits. In parallel with the printing of semiconductors and electrodes, selective deposition of gate insulators (GI) is an equally important factor in simplifying the fabrication of integrated devices, such as NAND and NOR gates, and memory devices. This study demonstrates the fabrication of six types of printed GI layers (high/low-k polymer and organic–inorganic hybrid material), which are utilized as GIs in organic field-effect transistors (OFETs), using the electrostatic-force-assisted dispensing printing technique. The selective printing of GIs on the gate electrodes enables us to develop practical integrated devices that go beyond unit OFET devices, exhibiting robust switching performances, non-destructive operations, and high gain values. Moreover, the flexible integrated devices fabricated using this technique exhibit excellent operational behavior. Therefore, this facile fabrication technique can pave a new path for the production of practical integrated device arrays for next-generation devices.