FASTBUS cable segment master controlled via CAMAC
- 1 January 1986
- journal article
- Published by Elsevier in Computer Standards & Interfaces
- Vol. 5 (2), 79-84
- https://doi.org/10.1016/0920-5489(86)90073-5
Abstract
No abstract availableKeywords
This publication has 12 references indexed in Scilit:
- A FASTBUS Master Controlled by a Multibus SBC and by a Personal MicrocomputerIEEE Transactions on Nuclear Science, 1985
- The SLAC Scanner Processor: A FASTBUS Module for Data Collection and ProcessingIEEE Transactions on Nuclear Science, 1985
- FASTBUS Processor Interface for VAX-11IEEE Transactions on Nuclear Science, 1984
- FASTBUS Processor Interface for Eight-Bit Microprocessor, CCP-FPIIEEE Transactions on Nuclear Science, 1984
- A FASTBUS Processor Interface Using a 68000 MicroprocessorIEEE Transactions on Nuclear Science, 1984
- A FASTBUS Segment Management and Interface UnitIEEE Transactions on Nuclear Science, 1984
- An I/O Register to FASTBUS InterfaceIEEE Transactions on Nuclear Science, 1983
- A FASTBUS Controller Module Using a MULTIBUS MPUIEEE Transactions on Nuclear Science, 1983
- FASTBUS Host Interface for VAX/VMSIEEE Transactions on Nuclear Science, 1983
- Data Collticn from FASTBUS to a PDP-11 Throgh the UNIBUS-Ppocessor InerfaceIEEE Transactions on Nuclear Science, 1983