Punch-through MOSFET for high-speed logic
- 1 January 1978
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
This paper will describe punch-through mode operation of a submicron gate MOSFET for high-speed and low-power logic ICs. Switching delays of 90ps and minimum power-delay products of 2fJ have been obtained with ring oscillators.Keywords
This publication has 3 references indexed in Scilit:
- Field-effect transistor versus analog transistor (static induction transistor)IEEE Transactions on Electron Devices, 1975
- Fundamental performance limits of MOS integrated circuitsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1975
- Design of micron MOS switching devicesPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1972