Digital Logic at the Gate and Functional Level
- 1 January 1979
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 242-248
- https://doi.org/10.1109/dac.1979.1600114
Abstract
No abstract availableKeywords
This publication has 4 references indexed in Scilit:
- LSI Components Modelling in a Three-Valued Functional SimulationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1978
- Digital Logic Simulation in a Time-Based, Table-Driven EnvironmentComputer, 1975
- Concurrent simulation of nearly identical digital networksComputer, 1974
- A Deductive Method for Simulating Faults in Logic CircuitsIEEE Transactions on Computers, 1972