RSFQ arithmetic blocks for DSP applications
- 1 June 1995
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Applied Superconductivity
- Vol. 5 (2), 2823-2826
- https://doi.org/10.1109/77.403179
Abstract
No abstract availableKeywords
This publication has 8 references indexed in Scilit:
- Implementation of a FFT radix 2 butterfly using serial RSFQ multiplier-addersIEEE Transactions on Applied Superconductivity, 1995
- Single flux, quantum B flip-flop and its possible applicationsIEEE Transactions on Applied Superconductivity, 1994
- Bit-serial multiplier based on Josephson latching logicIEEE Transactions on Applied Superconductivity, 1993
- High-performance bit-serial adders and multipliersIEE Proceedings G Circuits, Devices and Systems, 1992
- PSCAN: personal superconductor circuit analyserSuperconductor Science and Technology, 1991
- RSFQ logic/memory family: a new Josephson-junction technology for sub-terahertz-clock-frequency digital systemsIEEE Transactions on Applied Superconductivity, 1991
- Serial/parallel automultiplierElectronics Letters, 1987
- Two's Complement Pipeline MultipliersIEEE Transactions on Communications, 1976