High-voltage regulation and process considerations for high-density 5 V-only E/sup 2/PROM's

Abstract

A high density 5-V-only HMOS 1 FLOTOX E/SUP 2/PROM technology has been developed using stepper lithography and dry etching techniques. A 1.5-/spl mu/m minimum feature size and 0.5-/spl mu/m registration result in a FLOTOX cell with an area of 270 /spl mu/m/SUP 2/. This represents a 50% reduction of the original cell size. Equivalent endurance (10K cycles) and data retention (10 years) have been obtained. Improved critical dimension control has increased the uniformity of the new cell within the array. Junction leakage has been reduced by using an extended low-temperature anneal cycle. Circuit techniques have been developed to ensure full temperature range (-55-125/spl deg/C) operation. A capacitive voltage divider in a feedback loop, an E/SUP 2/ trimmable voltage reference, and a switched-capacitor RC network are employed to produce a temperature-stable programming pulse with a rising edge time constant of ~ 600 /spl mu/s. The programming voltage can be trimmed with an accuracy of /spl plusmn/ 0.5 V over a typical range of 19-24 V in order to match the requirements of the array. 16K and 64K 5-V-only E/SUP 2/PROMs with die sizes of 128 /spl times/ 182 mil and 223 X 278 mil have been fabricated.