Wafer through-hole interconnections with high vertical wiring densities
- 1 January 1996
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Components, Packaging, and Manufacturing Technology: Part A
- Vol. 19 (4), 516-522
- https://doi.org/10.1109/95.554933
Abstract
No abstract availableThis publication has 5 references indexed in Scilit:
- Photolithography in anisotropically etched groovesPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Fabrication technology for wafer through-hole interconnections and three-dimensional stacks of chips and wafersPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Wafer through-hole interconnections with high vertical wiring densitiesIEEE Transactions on Components, Packaging, and Manufacturing Technology: Part A, 1996
- Photolithography on micromachined 3D surfaces using electrodeposited photoresistsSensors and Actuators A: Physical, 1995
- High Resolution Shadow Mask Patterning In Deep Holes And Its Application To An Electrical Wafer Feed-throughPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1995