Processes for Fabricating a Planar P-N-P Silicon Transistor
- 1 September 1962
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IRE Transactions on Component Parts
- Vol. 9 (3), 96-101
- https://doi.org/10.1109/tcp.1962.1136760
Abstract
No abstract availableKeywords
This publication has 2 references indexed in Scilit:
- Diffusion and oxide masking in silicon by the box methodSolid-State Electronics, 1960
- A Modified Closed Box System for the Diffusion of Boron in SiliconJournal of the Electrochemical Society, 1960