Electrical characteristics of metal–ferroelectric (PbZrxTi1−xO3)–insulator(Ta2O5)–silicon structure for nonvolatile memory applications

Abstract

A metal–ferroelectric–insulator–silicon (MFIS) structure using lead–zirconate–titanate (PZT) as the ferroelectric layer and ${\mathrm{Ta}}_{\mathrm{2}}{\mathrm{O}}_5$ as the insulator layer is fabricated. This structure is studied for the potential application of nonvolatile memory devices. The ${\mathrm{Ta}}_{\mathrm{2}}{\mathrm{O}}_5$ layer is used as a buffer layer to minimize the out diffusion of silicon atoms during heat treatment processes. High frequency capacitance–voltage measurements show a flat band voltage shift of 13 V under a ±15 V writing pulse. The interface-trap density $D_{\mathrm{it}}$ is measured by the conductance method. The MFIS capacitors are shown to have a fatigue lifetime of ${\text{1×10}}^{11}$ cycles and ${\text{5×10}}^7$ cycles for 11.4 and 15 V writing pulses, respectively.