A current mode algorithmic analog-to-digital converter

Abstract

A novel algorithmic analog-to-digital converter (ADC), using current instead of voltage to represent the signal, is described. The use of current eliminates switch-induced errors due to charge injection and results in reasonably high sampling rates without the need for large chip areas. To test this new concept, a 6-bit converter using a 3- mu m CMOS process was fabricated. The resulting circuit occupies a sampling rate of 200 kHz while drawing only 5 mW from a single 5-V supply. The speed of the ADC was limited by the settling time of the relatively large current mirrors.> Author(s) Nairn, D.G. Dept. of Electr. Eng., Toronto Univ., Ont., Canada André T.Salama, C.