Bipolar transistor design for optimized power-delay logic circuits
- 1 August 1979
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 14 (4), 679-684
- https://doi.org/10.1109/jssc.1979.1051244
Abstract
No abstract availableThis publication has 11 references indexed in Scilit:
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