Generation of Stacking Faults and Dislocation Loops in Silicon Wafers
- 1 February 1972
- journal article
- research article
- Published by AIP Publishing in Journal of Applied Physics
- Vol. 43 (2), 733-735
- https://doi.org/10.1063/1.1661189
Abstract
Thermal oxidation of silicon is shown to result in the generation of stacking faults and dislocation loops at a damage‐free polish‐etched surface provided the silicon wafer is subjected to a prior thermal treatment. If a fresh damage‐free surface is created following the preoxidation thermal treatment, only dislocation loops are generated. The concentration of both types of defects are strongly affected by the cooling rate from the preoxidation thermal treatment.Keywords
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