A proposed method for determining a MOSFET gate electrode's bottom dimension and the on-state fringing capacitance
- 1 January 1993
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- Vol. 12 (1), 96-101
- https://doi.org/10.1109/43.184846
Abstract
No abstract availableKeywords
This publication has 11 references indexed in Scilit:
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