A 500-MHz 16*16 complex multiplier using self-aligned gate GaAs heterostructure FET technology
- 1 October 1989
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 24 (5), 1295-1300
- https://doi.org/10.1109/jssc.1989.572600
Abstract
No abstract availableKeywords
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