Boosting beyond static scheduling in a superscalar processor

Abstract

A superscalar processor that combines the best qualities of static and dynamic instruction scheduling to increase the performance of nonnumerical applications is described. The architecture performs all instruction scheduling statically to take advantage of the compiler's ability to schedule operations across many basic blocks efficiently. Since the conditional branches in nonnumerical code are highly data dependent, the architecture introduces the concept of boosted instructions, that is, instructions that are committed conditionally upon the result of later branch instructions. Boosting effectively removes the dependences caused by branches and makes the scheduling of side-effect instructions as simple as it is for instructions that are side-effect free. For efficiency, boosting is supported in the hardware by shadow structures that temporarily hold the side effects of boosted instructions until the conditional branches that the boosted instructions depend upon are executed.<>