High mobility n-channel metal-oxide-semiconductor field-effect transistors based on SiO2-InP interface

Abstract

Low temperature (250–300 °C) deposition of SiO₂ gate oxide using a novel plasma‐enhanced chemical vapor deposition technique is described. In this technique, the substrate was not directly exposed to the plasma, thereby minimizing radiation damage to both the substrate and the film. A dc potential was used to generate the plasma and the deposition of the film was achieved at low pressures (0.8–1.0 Torr) and extremely low plasma power (0.3 W/cm²) using silane (SiH₄) and nitrous oxide (N₂O) reactant sources. The dielectric films deposited using this process, typically had resistivities ≥10¹⁵ Ω cm, a dielectric constant of 3.95, refractive index of 1.462, and breakdown fields ≥5×10⁶ V/cm. Metal‐oxide‐semiconductor (MOS) capacitors showed sharp interfaces with densities of states in the range of 5×10¹¹ cm⁻² eV⁻¹. 4‐μm gate length enhancement mode metal‐oxide‐semiconductor field‐effect transistors were processed on p‐InP substrates using a 1000‐Å SiO₂ gate oxide. No hysteresis loops were observed in the dc characteristics of the transistors nor was any significant channel current typical at zero gate bias. An effective electron channel mobility of 2600 cm² V⁻² s⁻¹ was obtained for the transistors which exhibited a threshold voltage of +0.22 V and transconductance in the range of 40 mS/mm.