A flexible multiport RAM compiler for data path
- 1 March 1991
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 26 (3), 343-349
- https://doi.org/10.1109/4.75013
Abstract
No abstract availableKeywords
This publication has 9 references indexed in Scilit:
- A 50 ns video signal processorPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- The i960CA SuperScalar implementation of the 80960 architecturePublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- High speed multi-port static RAM silicon compilerPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1989
- An N-bus datapath compiler for IC designPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1989
- The twin-port memory cellIEEE Journal of Solid-State Circuits, 1987
- MIPS-X: a 20-MIPS peak, 32-bit microprocessor with on-chip cacheIEEE Journal of Solid-State Circuits, 1987
- A 32b NMOS microprocessor with a large register filePublished by Institute of Electrical and Electronics Engineers (IEEE) ,1984
- Pictures with Parentheses: Combining Graphics and Procedures in a VLSI Layout ToolPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1983
- A new register file structure for the high-speed microprocessorIEEE Journal of Solid-State Circuits, 1982