Modeling of the on-resistance of LDMOS, VDMOS, and VMOS power transistors

Abstract

Power MOS transistors have recently begun to rival bipolar devices in power-handling capability. This new capability has arisen primarily through the use of double-diffusion techniques to achieve short active channels and the incorporation of a lightly doped drift region between the channel and the drain contact, which largely supports the applied voltage. Many different structures have been proposed to implement these new devices. This paper considers three of the most common-LDMOS, VDMOS, and VMOS. Structural differences which result in on-resistance and transconductance differences between the devices are described. Quantitative models, suitable for device design, are developed for the on-resistance of each type of structure. These models are developed directly from the physical structure (geometry and doping profiles) so that they are useful in optimizing a particular device structure or in quantitatively comparing structures for a particular application.