Effects of the diffused impurity profile on the DC characteristics of VMOS and DMOS devices

Abstract

Double-diffused MOS (DMOS) and V-groove MOS (VMOS) transistors have been simultaneously fabricated in order to investigate the effects of impurity profiles on device performance. Processing parameters are varied to achieve a range of channel lengths and peak channel dopings. The resulting impurity profiles are measured by the two point probe spreading resistance method. Properties of the lateral DMOS impurity profile are inferred from a comparison of the electrical characteristics of the VMOS and DMOS devices. It is found that conventional models inadequately simulate the output conductance of the devices in saturation. An expression for channel length modulation is derived from a one-dimensional solution of Poisson's equation in the region surrounding the channel-drain junction. When measured impurity profile data are incorporated into the new channel length modulation model, the output conductance of the devices is accurately simulated for channel lengths ranging from 0.6 to 2.0 /spl mu/m.