Modeling of Source-Gated Transistors in Amorphous Silicon

Abstract

The most important advantage of a source-gated transistor compared with a field-effect transistor (FET) is its low saturation voltage and high output impedance. Here we model a reverse biased gated Schottky barrier source in hydrogenated amorphous silicon and show good qualitative agreement between the calculated effect of source geometry and measurements. Furthermore, calculations of electron concentration profiles in the source show why the source-gated transistor in hydrogenated amorphous silicon is more stable than an equivalent FET.