Single 5-V, 64k RAM with Scaled-Down MOS Structure
- 1 August 1980
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 15 (4), 672-677
- https://doi.org/10.1109/jssc.1980.1051454
Abstract
No abstract availableKeywords
This publication has 7 references indexed in Scilit:
- A single 5V 64K dynamic RAMPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1980
- Characteristics and limitation of scaled-down MOSFET's due to two-dimensional field effectIEEE Transactions on Electron Devices, 1979
- 1 /spl mu/m MOSFET VLSI technology. IV. Hot-electron design constraintsIEEE Journal of Solid-State Circuits, 1979
- A 64 Kbit MOS dynamic random access memoryIEEE Journal of Solid-State Circuits, 1979
- A fault-tolerant 64K dynamic RAMPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1979
- Design of ion-implanted MOSFET's with very small physical dimensionsIEEE Journal of Solid-State Circuits, 1974
- Fundamental limitations in microelectronics—I. MOS technologySolid-State Electronics, 1972