A 5 V-only 64K dynamic RAM based on high S/N design
- 1 October 1980
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 15 (5), 846-854
- https://doi.org/10.1109/jssc.1980.1051481
Abstract
A 5 V-only 64K dynamic RAM is designed and fabricated using double poly-Si technology based on the 3 /spl mu/m design rule. The design features of this dynamic RAM are described. In particular, memory cell and S/N (signal/noise) designs are focused of a dynamic RAM with an on-chip bias generator. The device fabricated provides a typical access time of 120 ns and a 170 mW operating power, with minimized sense noise of less than 50 mV.Keywords
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